The invention pertains to the field of output buffers for semiconductor integrated circuits.
When a conventional output buffer of an integrated circuit drives an external capacitive load through a transmission line, signal reflections appearing on the transmission line can cause large voltage spikes, or “bounce”, in the ground and/or supply circuits of the integrated circuit. This noise can couple into critical analog circuits through various paths, such as the substrate or the electrostatic discharge (ESD) ring, and degrade the performance of the IC. Traditional output buffers are designed to drive a maximum load capacitance under the weakest expected operating conditions, and therefore under stronger operating conditions may generate an excessive amount of ground and/or supply noise.
More recently, intelligent buffers have been designed to observe the output voltage at specified time instants in order to estimate the rise/fall time of the output signal, and then adjust their output strength to what is sufficient. But because of transmission line effects, the voltage observed at the output pin may not give a valid estimate of the rise time at the load end of the transmission line, and thus even such intelligent output buffers may be of only limited effectiveness in reducing ground and supply noise arising from signal reflections.
It would be desirable to reduce the level of ground and/or supply noise arising from transmission line effects in integrated circuits.